@inproceedings{d9e8d2acf20e462abf5a0a804714dd5e,
title = "Quad-level bit-stream signal processing on FPGAs",
abstract = "Quad-level bit-stream signal processing (BSSP) circuits are implemented and their performances are compared with previously published tri-level and bi-level BSSP implementations on FPGAs. BSSP refers to the process of performing computation directly on over-sampled delta-sigma modulated signals to eliminate the need of resource consuming decimators and interpolators. Quad-level BSSP offers better performance than their bi-and tri-level counterparts at the expense of higher resource utilization. Using a digital phase locked loop (DPLL) and a quadrature phase-shift keying (QPSK) demodulator as application examples, the effectiveness of quad-level BSSP on FPGAs is studied. The BSSP approach will be contrasted with conventional multi-bit implementations using built-in digital signal processing blocks in modern FPGAs.",
author = "Ng, \{Chiu Wa\} and Ngai Wong and So, \{Hayden Kwok Hay\} and Ng, \{Tung Sang\}",
year = "2008",
doi = "10.1109/FPT.2008.4762405",
language = "English",
isbn = "9781424427963",
series = "Proceedings of the 2008 International Conference on Field-Programmable Technology, ICFPT 2008",
pages = "309--312",
booktitle = "Proceedings of the 2008 International Conference on Field-Programmable Technology, ICFPT 2008",
note = "2008 International Conference on Field-Programmable Technology, ICFPT 2008 ; Conference date: 07-12-2008 Through 10-12-2008",
}