Layer-by-layer-assembled reduced graphene oxide/gold nanoparticle hybrid double-floating-gate structure for low-voltage flexible flash memory

A hybrid double-floating-gate flexible memory device by utilizing an rGO-sheet monolayer and a Au NP array as upper and lower floating gates is reported. The rGO buffer layer acts as a charge-trapping layer and introduces an energy barrier between the Au NP lower floating gate and the channel. The proposed memory device demonstrates a strong improvement in both field-effect-transistor (FET) and memory characteristics.